Systems and methods of transporting internal radio base station (RBS) interface information over a packet switched network

ABSTRACT

Systems and methods of transporting internal radio base station (RBS) interface information over a packet network are presented. In one exemplary embodiment, in an interworking function (IWF) for communicating packets between a radio equipment (RE) and a radio equipment controller (REC) of a radio base station (RBS), a method may include receiving a packet sent from another IWF and having internal RBS interface information and residence time measurement (RTM) information that characterizes an asymmetry between processing times on links in different directions between the RE and the REC. Further, the method may include determining an asymmetry compensation that compensates for the asymmetry using the RTM information. Also, the method may include applying the asymmetry compensation to a timestamp of the internal RBS interface information to obtain an updated internal RBS interface information. In addition, the method may include transmitting the updated internal RBS interface information to one of the RE and the REC that is attached to the IWF.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to U.S. Provisional App. No.62/162,441, filed May 15, 2015, which is hereby incorporated byreference as if fully set forth herein.

FIELD OF USE

This application generally relates to the field of communications andmore specifically to systems and methods of transporting internal radiobase station (RBS) interface information over a packet switched network.

BACKGROUND

In a typical cellular radio system, wireless user equipment units (UEs)communicate via a radio access network (RAN) to one or more corenetworks. The user equipment units (UEs) may be mobile telephones laptopcomputers with mobile termination, and thus may be, for example,portable, pocket, hand-held, computer-included, or car-mounted mobiledevices which communicate voice and/or data with radio access network.Alternatively, the wireless user equipment units may be fixed wirelessdevices, e.g., fixed cellular devices/terminals which are part of awireless local loop or the like. The RAN covers a geographical areawhich is divided into cell areas, with each cell area being served by aradio base station (RBS) such as a base transceiver station (BTS) or aNodeB/eNodeB. Each RBS communicates over an air interface with UEs thatare within range. In the RAN, for 2G and 3G, multiple RBSs are typicallycoupled such as by landline or microwave to a control node known as abase station controller (BSC) or a radio network controller (RNC). Thecontrol node supervises and coordinates various activities of themultiple RBSs coupled thereto. Control nodes are typically coupled toone or more core networks. One example of a RAN is the Universal MobileTelecommunications System (UMTS) Terrestrial Radio Access Network(UTRAN). UMTS is a third generation system which builds upon the radioaccess technology known as Global System for Mobile communications(GSM). UTRAN provides wideband code division multiple access (WCDMA) toUEs. Further evolution of mobile technology has moved towards Long-TermEvolution (LTE) and LTE Advanced technologies having similararchitectures.

In many RANs, each RBS is located at a single site. However, RBSs mayhave a distributed architecture. For example, a distributed RBSarchitecture may take the form of one or more radio equipment (RE)portions that are linked to a radio equipment control (REC) portion overan internal RBS interface.

Such distributed RBS architecture may have a main processor at each REC,and a set of antennas with dedicated RF equipment able to cover multipleradio cells at each RE, where the main processor may be shared amongmultiple REs. This architectural may provide higher capacity, lowercost, and lower latency between the RECs and the REs. The Common PublicRadio Interface (CPRI) is an example of an internal RBS interface thatlinks an RE portion of the radio base station to a radio equipmentcontrol portion of the base station. Other interfaces may be used, forexample the Open Base Station Architecture Initiative (OBSAI).

This approach of providing “remotization” of the RE portion of the RBSfrom the REC portion may bring some notable advantages, including:

a) rationalization of RBS processing unit, with benefits in terms ofcost and power consumption;

b) dynamic allocation of RF and/or processing resources depending oncell load and traffic profiles; and

c) correlation of data supported by all the antennas which are afferenton the same processing unit, which increases radio link reliability,bandwidth, and coverage and optimizes the power consumption.

This may enable some “cloud computing” concepts to be applied to theRANs. Point to point (P2P) optical links are currently generally usedfor the interface between the REC and the RE. For this interface, WDMsystems, especially the ones used in the access (WDM-PON), may be usedas they may enable guaranteed low latency, protocol transparency, highbandwidth and an increased spectral efficiency. Notably CPRI haspressing constraints in terms of latency (round-trip delay) and inparticular in terms of uplink/downlink synchronization.

The CPRI standard recites optical fibers for transmission link up to tenkilometers (10 km), recites determining a round trip delay, andspecifies synchronization and timing accuracies, e.g. link round tripdelay accuracy of sixteen nanoseconds (16 nsec.).

As previously mentioned, an RBS is functionally separated into an RE andan REC. An RE may also be referred to as a radio resource unit (RRU). AnREC may also be referred to as a digital unit (DU) or a baseband unit(BBU). The RE converts a transmit baseband signal to a transmit radiofrequency (RF) signal and then feeds the transmit RF signal to anantenna. Further, the RE receives an RF signal from the antenna andconverts the received RF signal to a received baseband signal. The RECgenerates the transmit baseband signal and processes the receivedbaseband signal.

In a conventional wireless mobile network, the antenna, RE and REC aretypically integrated into a single network node and placed at a cellsite. As data rates and the number of subscribers continue to increase,the coverage area of typical cell sites may decrease. As the coveragearea decreases, additional cell sites may be required. However, addingcell sites results in higher costs for network operators, since eachcell site typically includes a source of power, real estate and a celltower.

To address these issues, a RAN architecture has been developed to alloweach RE to be geographical separated from its corresponding REC. Bydoing so, each REC may be co-located at a centralized location whileeach RE may be located at a corresponding cell site. An RE located at acell site may also be referred to as a remote radio unit (RRU). Further,a point-to-point link may be used to couple a RE and an REC.

An interface specification for communications between an RE and an REChas been developed. The most widely adopted specification is the CPRIsuch as described by CPRI Specification Version 6.1. The CPRIspecification describes the interface between a RE and an REC of the RBSsystem. FIG. 1 illustrates a CPRI reference scheme in an RBS system.

Current industry trends show a large number of REs distributed over ageographical area, with their corresponding RECs pooled at a centralizedlocation, which is also referred as a baseband hotel. Further, thecentralized pool of RECs is used to control the large number of REsdistributed over the geographical area. This network architecture iscommonly referred as C-RAN, which may also be referred to as cloud RAN,centralized RAN or coordinated RAN. The term cloud RAN is typically usedto emphasize that RAN functions are virtualized in a centralizedoff-the-shelf server. The term centralized RAN is typically used toemphasize that RAN is managed by pooling RECs in a centralized location,which may also be referred to as an REC pool site. The term coordinatedRAN is typically used to recognize the benefit of having RECs in thesame location for coordination and cooperative transmission/reception ofdata.

In a C-RAN system, mobile traffic such as CPRI traffic is communicatedover a communication link between the REC pool site and each RE site.This communication link is typically over a long distance and may alsobe referred to as a fronthaul. The communication link may have a forwardlink from the REC to the RE and a reverse link from the RE to the REC.For CPRI traffic, the communication link must meet certain performancerequirements such as latency, jitter and symmetry. In particular, theoverall latency over the network is typically within about one hundredmicroseconds (100 usec.). Further, the asymmetry between the forward andreverse transmissions is typically on the order of tens of nanoseconds.Also, the jitter is typically a few parts per billion.

The requirement for a symmetric network is associated with the need tocalibrate for the overall delay. Further, the ability to meet thisrequirement becomes more challenging for a communication link usingpacket communications. This requires the reverse traffic packet and thecorresponding forward traffic packet between the REC and the RE to besymmetric within a requirement of a few nanoseconds. For example, athirty-two nanosecond (32 nsec.) asymmetry corresponds to sixteennanoseconds (16 nsec.) error in the measurement of the overall delay. Infact, link delay calibration may be performed using a calculation of theround trip delay. FIG. 2 illustrates calibration of link delay in an RBSsystem using CPRI.

With these requirements, the transport of CPRI traffic over atraditional packet network in an RBS system is impractical due to atleast packet delay variation (PDV) and asymmetry. However, the use ofpacket technologies to transport fronthaul traffic provides the abilityto optimize resources among other things.

Various standards setting projects are ongoing to define the transportof time-sensitive traffic such as by using scheduled traffic principlesdescribed in IEEE802.1bv. In one example, IEEE802.1bv describestechniques to minimize or remove the impact of buffers on time sensitivetraffic. Further, FIG. 3 illustrates establishing a guard band asdescribed by IEEE802.1bv.

In another example, IEEE802.1 (P802.1Qbu) is defining mechanisms tosupport frame pre-emption in IEEE802.1Q bridges such as interrupting anddelaying the transmission of a frame to allow transmission of a higherpriority frame. This bridging mechanism relies on media access control(MAC) interfaces defined in IEEE802.3br.

Other similar initiatives have also commenced within the DeterministicNetwork Working Group (WG) of the Internet Engineering Task Force(IETF).

In addition, standards projects are ongoing to redefine the CPRIspecification, including removing overhead from the CPRI traffic byreassigning functions from the REC to the RE. These projects assume thattiming information is carried out-of-band such as by using IEEE1588 andnot by the CPRI traffic per current practices. This assumption allowsfor various implementation options. For instance, CPRI traffic may beretimed at the edge of a packet network to filter out PDV and toequalize delays such as processing delays on both forward and reversedirections. This method may be implemented in the RE or external to theRE such as to support a legacy RE.

Furthermore, the transport of CPRI traffic over a packet networkrequires specific mapping procedures. For instance, the IEEE1904.3standards group is investigating mechanisms analogous to the PWE(Pseudo-Wire Emulation) CW (Control Word). Further, generalizedassociated channel (G-ACh)-based residence time measurement (RTM) may beused by time synchronization protocols to transport packets over amulti-protocol label switching (MPLS) domain, in practice applyingsimilar concepts to the transparent clock functions defined by IEEE1588.Specific aspects of this technique associated with 2-step clockprinciples have been patented by Ericsson, the assignee of the presentapplication.

Existing solutions for the transport of CPRI traffic over a traditionalpacket network in a C-RAN system suffer from a number of problems. Forinstance, the transport of CPRI traffic over a packet network iscurrently not feasible due to PDV and asymmetry induced by the packettechnologies. These problems lead to exceeding the stringent timingrequirements of the CPRI traffic. A solution to these problems is toallow the transport of timing sensitive information, which is currentlybeing discussed in the IEEE802.1 Time-Sensitive Networking (TSN) group.Some of the proposals for this solution require time synchronization bythe packet nodes, apply scheduled traffic principles, and assume thatall packet nodes are synchronized by IEEE1588-PTP. In practice, a timedivision multiplexing (TDM) approach is assumed such as having fixedtimeslots allocated to specific traffic classes over a packet network.Such a solution may result in meeting a PDV requirement and havingcontrolled latency.

However, the use of these principles is not sufficient to carry CPRItraffic over a packet switched network (PSN). In particular, theIEEE802.1 specifications may not fully address latency or PDV (packetdelay variation). For instance, contention among traffic belonging tothe same traffic class such as two CPRI traffic flows beingcontemporaneously received by the same node is not fully addressed eventhough a common case in CPRI scenarios. Further, contention among CPRIand non-CPRI traffic flows is also not addressed, preventing the use ofmulti-purpose packet nodes.

As previously mentioned, asymmetry may be corrected if the precisiontime protocol (PTP) is distributed to all nodes, as assumed in theIEEE802.1bv specification. By doing so, the actual end-to-end delays, inboth directions, may be measured and used to compensate for asymmetry.However, requirements for delivering PTP to all network nodes might bean issue considering the level of accuracy required. Accordingly, thereis a need for improved techniques for transporting internal RBSinterface information over a packet switched network. In addition, otherdesirable features and characteristics of the present disclosure willbecome apparent from the subsequent detailed description and claims,taken in conjunction with the accompanying figures and the foregoingtechnical field and background.

The Background section of this document is provided to place embodimentsof the present disclosure in technological and operational context andto assist those of skill in the art in understanding their scope andutility. Unless explicitly identified as such, no statement herein isadmitted to be prior art merely by its inclusion in the Backgroundsection.

SUMMARY

The following presents a simplified summary of the disclosure in orderto provide a basic understanding to those of skill in the art. Thissummary is not an extensive overview of the disclosure and is notintended to identify key/critical elements of embodiments of thedisclosure or to delineate the scope of the disclosure. The sole purposeof this summary is to present some concepts disclosed herein in asimplified form as a prelude to the more detailed description that ispresented later.

Briefly described, embodiments of the present invention relate totransporting internal radio base station (RBS) interface informationover a packet switched network. According to one aspect, in aninterworking function (IWF) for communicating packets between a radioequipment (RE) and a radio equipment controller (REC) of a radio basestation (RBS), a method may include receiving a packet sent from anotherIWF and having internal RBS interface information and residence timemeasurement (RTM) information that characterizes an asymmetry and packetdelay between processing times on links in different directions betweenthe RE and the REC. Further, the method may include determining anasymmetry compensation that compensates for the asymmetry using the RTMinformation. Also, the method may include applying the asymmetrycompensation to a timestamp of the internal RBS interface information toobtain an updated internal RBS interface information or may includeapplying a predefined delay to result in symmetric paths. In addition,the method may include transmitting the updated internal RBS interfaceinformation to one of the RE and the REC that is attached to the IWF. Inaddition, the method may include normalization of the delay of thepackets applying some predefined value as to remove packet delayvariation.

It is important to recognize that while the techniques discussed hereinare directed at an RBS, such techniques may be applied to any systemhaving a packet-switched network. For instance, the techniques ofreducing the effects of asymmetry and PDV may be applied to othersystems incorporating a packet-switched network.

According to another aspect, an IWF for communicating packets between anRE and an REC of an RBS may be configured to include a processoroperationally coupled to a first interface circuit and a secondinterface circuit. The first interface circuit may be configured toreceive a packet sent from another IWF and having an internal RBSinterface information and an RTM information that characterizes anasymmetry between processing times on links in different directionsbetween the RE and the REC. Further, the processor may be configured todetermine the asymmetry compensation that compensates the asymmetryusing the RTM information. The processor may be further configured toapply the asymmetry compensation to a timestamp of the internal RBSinterface information to obtain an updated internal RBS interfaceinformation. Also, the second interface circuit may be configured totransmit the updated internal RBS interface information to one of the REand the REC that is attached to the IWF.

According to another aspect, a system for communicating packets betweenan RE and an REC of an RBS may be configured to include a first IWFoperationally coupled to the RE and a second IWF operationally coupledbetween the first IWF and the REC. The first IWF may be configured toreceive a forward packet transmitted from the second IWF having aforward internal RBS interface information and a forward RTM informationthat characterizes a forward PDV of the forward packet on a forwardlink. In addition, the first IWF may be further configured to determinea forward PDV compensation that compensates for the forward PDV usingthe forward RTM information. The first IWF may be further configured toapply the forward PDV compensation to a forward transmission time of theforward internal RBS interface information to obtain a compensatedforward transmission time. Also, the first IWF may be further configuredto transmit, to the RE, the updated forward internal RBS interfaceinformation at the compensated forward transmission time. The second IWFmay be configured to receive a reverse packet sent from the first IWFand having a reverse internal RBS interface information and a reverseRTM information that characterizes a reverse PDV of the reverse packeton a reverse link. In addition, the second IWF may be further configuredto determine a reverse PDV compensation that compensates for the reversePDV using the reverse RTM information. Also, the second IWF may befurther configured to apply the reverse PDV compensation to a reversetransmission time of the reverse internal RBS interface information toobtain a compensated reverse transmission time. The second IWF may beconfigured to transmit, to the REC, the updated reverse internal RBSinterface information at the compensated reverse transmission time.

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure is illustrated by way of examples, embodimentsand the like and is not limited by the accompanying figures, in whichlike reference numbers indicate similar elements. Elements in thefigures are illustrated for simplicity and clarity and have notnecessarily been drawn to scale. The figures along with the detaileddescription are incorporated and form part of the specification andserve to further illustrate examples, embodiments and the like, andexplain various principles and advantages, in accordance with thepresent disclosure, where:

FIG. 1 illustrates a reference scheme for an RBS system using CPRI.

FIG. 2 illustrates calibration of link delay in an RBS system usingCPRI.

FIG. 3 illustrates establishing a guard band as described byIEEE802.1bv.

FIG. 4 provides an example application of one embodiment of a system fortransporting CPRI packets over a packet switched network in accordancewith various aspects as described herein.

FIG. 5 illustrates another embodiment of a system for transporting CPRIpackets over a packet network in accordance with various aspects asdescribed herein.

FIG. 6 illustrates one embodiment of a first IWF in accordance withvarious aspects as described herein.

FIG. 7 illustrates another embodiment of a second IWF in accordance withvarious aspects as described herein.

FIG. 8 provides a format of an RTM control message with a pseudo-wireassociated channel header (PW ACH) in accordance with various aspects asdescribed herein.

FIG. 9 provides a format of a precision time protocol (PTP) sub-TLV thatprecedes a PTP packet carried in the RTM TLV in accordance with variousaspects as described herein.

FIG. 10 provides a format of the FLAGS field of the PTP sub-TLV of FIG.9 in accordance with various aspects as described herein.

FIG. 11 illustrates another embodiment of an RBS system transportinginternal RBS interface information over a packet switched network inaccordance with various aspects as described herein.

FIG. 12 illustrates another embodiment of an IWF with various aspects asdescribed herein.

FIG. 13 provides one embodiment of a method of communicating packetsbetween an RE and an REC of an RBS in accordance with various aspects asdescribed herein.

FIG. 14 provides another embodiment of a method of communicating packetsbetween an RE and an REC of an RBS in accordance with various aspects asdescribed herein.

FIG. 15 provides another embodiment of a method of communicating packetsbetween an RE and an REC of an RBS in accordance with various aspects asdescribed herein.

FIG. 16 provides another embodiment of a method of communicating packetsbetween an RE and an REC of an RBS in accordance with various aspects asdescribed herein.

FIG. 17 provides an example application of one embodiment of a systemfor using accumulated residence time to shape packet traffic and reducepacket delay variation in accordance with various aspects as describedherein.

FIG. 18 provides an example application of another embodiment of asystem for using accumulated residence time to shape packet traffic andreduce packet delay variation in accordance with various aspects asdescribed herein.

DETAILED DESCRIPTION

For simplicity and illustrative purposes, the present disclosure isdescribed by referring mainly to exemplary embodiments thereof. In thefollowing description, numerous specific details are set forth in orderto provide a thorough understanding of the present disclosure. However,it will be readily apparent to one of ordinary skill in the art that thepresent disclosure may be practiced without limitation to these specificdetails. In this description, well known methods and structures have notbeen described in detail so as not to unnecessarily obscure the presentdisclosure.

The current disclosure describes the transport of CPRI traffic over apacket switched network in a C-RAN system and provides techniques forcorrecting asymmetry and packet delay variation performing contentionresolution of CPRI and non-CPRI traffic flows on the same output portand multiple CPRI traffic flows on the same output port. In oneexemplary embodiment, a pseudo-wire emulation (PWE) packet carrying theCPRI traffic flow may include a header having a residence timemeasurement (RTM). Further, the RTM carried in the header of the PWEpacket may include a forward accumulated RTM and a reverse accumulatedRTM. By doing so, an end node such as the RE or the REC, or aninterworking function (IWF) attached to either, may use the forward andreverse accumulated residence times to compensate for asymmetry or PDV.The terms “forward” and “reverse” refer to the direction of the CPRItraffic flow with the forward direction from the REC to the RE and thereverse direction from the RE to the REC.

Existing Ethernet cable infrastructure may be used to encapsulate andtransport CPRI traffic, resulting in significant cost savings. Aspreviously mentioned, mapping CPRI traffic over Ethernet using a packetnetwork is subject to various technical challenges including fromdelays, asymmetries and contentions in packet nodes. One of theadvantages described by the present disclosure is that these technicalchallenges are reduced or removed without requiring the distribution ofPTP references and without requiring complete network synchronization.This approach facilitates the transport of CPRI traffic flows across amulti-operator environment. Further, this approach may not requireadditional IEEE802.1 tools.

The techniques described herein may be fully or partially implemented inthe RE or the REC. Further, the systems and methods described herein maybe fully or partially implemented outside the RE or the REC, allowingfor the use of an existing RE or REC. For any Ethernet switchesoperationally coupled between the RE and the REC, hardware, software orfirmware may need to be implemented in each Ethernet switch to supportthe accumulation of RTM in the forward and reverse directions. In oneexample, the hardware, software or firmware implemented in each Ethernetswitch may include functions analogous to the IEEE1588 transparent clockfunctions.

The techniques described herein may also be applied to other protocolssuch as PTP. For instance, applying the techniques described herein mayprovide a solution to the issue of layer violation created bytransparent clocks such as modifying the payload of PTP packets withoutupdating the source address of each packet.

In one embodiment, the IWF and each Residence Time Measurement(RTM)-enabled switch may evaluate the residence time of the packetizedCPRI flow. In principle, this would be sufficient only for the packetscarrying the CPRI timestamps when “out-of-band” means to distributefrequency synchronization are available, such as Synchronous Ethernet.

The IWF at the edge of the packet network may use the informationcarried in both directions of the accumulated residence time to evaluatethe asymmetries of the connection and use this information forcorrecting the information carried in the CPRI header or properly delaythe delivery of this information to the REC so as to compensate forasymmetry.

The asymmetry compensation may be calculated as the difference betweenthe accumulated residence time in the reverse direction and theaccumulated residence time in the forward direction. The accumulatedasymmetry correction for the forward direction may be available in thefirst IWF and may be subtracted directly when adding the first IWFresidence time. The second IWF may then, in the reverse direction,directly determine the asymmetry compensation.

In another embodiment, each of the values accumulated for the forwardpath and the reverse path may be delivered, for instance, from the firstIWF to the second IWF, which may avoid the need to use negativeaccumulated residence time values.

The asymmetry compensation may be determined as follows:T12=(T12+T34)/2−Asymmetry Compensation=(T14−T _(offset))/2−AsymmetryCompensation,  (Equation 1)where Asymmetry Compensation=(t _(forward) −t _(reverse))/2  (Equation2)

FIG. 4 provides an example application of one embodiment of a system 400for transporting CPRI packets over a packet switched network inaccordance with various aspects as described herein. A timestampexchange model may be used, which may be analogous to the network timeprotocol (NTP). The asymmetry compensation may be used to correct the T3information, described as follows:T12=(T14′−T _(offset)′)/2  (Equation 3)where T _(offset) ′=T3′−T2, and  (Equation 4)T3′=T3−Asymmetry correction.  (Equation 5)

Frequency synchronization may be carried using synchronous Ethernet(SyncE) and may be used to re-time the outgoing CPRI traffic towards theRE. However, if all CPRI packets are associated with their residencetime, accurate frequency synchronization may be carried by the CPRIpackets. Further, some processing to eliminate the PDV may be requiredin this case. In one example, the overall delay of the packet may beequalized by using the accumulated residence time information on a link.In another example, the IWF may use a shaping function to buffer eachpacket for a period of time substantially equivalent to a predefineddelay of no more than the corresponding accumulated residence time. Thepredefined delay may be a constant value or the result of an appropriatefunction known to a person of ordinary skill (e.g. based on the maximumaccumulated residence time, applying some constraint on the maximumallowed value depending on the applicable latency requirements). Thesame predefined delay and shaping function should be used in theopposite direction in order to compensate for asymmetry. In this casethere should be no need to modify the information carried in thetimestamp T3 as described earlier.

The synchronization of the CPRI reverse traffic carried towards the RECmay be directly provided by the connected REC using a loop-timing mode.

FIG. 5 illustrates another embodiment of a system 500 for transportingCPRI packets over a packet network in accordance with various aspects asdescribed herein. In FIG. 5, the system 500 may be configured to includean RE 501, a first IWF 503, a first switch 505, a second switch 507, asecond IWF 509 and an REC 511. The RE 501 may be operationally coupledto the first IWF 503, which may also be referred to as the first IWF 503being attached to the RE 501. Further, the REC 511 may be operationallycoupled to the second IWF 509, which may also be referred to as thesecond IWF 509 being attached to the REC 511. The first IWF 503 and thesecond IWF 509 may be operationally coupled using a first switch 505 anda second switch 507 of the packet network. The first switch 505 and thesecond switch 507 may be used to facilitate packet communicationsbetween the first IWF 503 and the second IWF 509. The first and secondIWFs 503 and 509 and the first and second switches 505 and 507 may useRTM. The first and second IWFs 503 and 509 may be standalone devices.However, the RE 501 may be configured to include the first IWF 503 andmay share resources such as a processor, a memory, an interface, or thelike. Similarly, the REC 511 may be configured to include the second IWF509 and may share resources such as a processor, a memory, an interface,or the like.

In FIG. 5, in operation, the first IWF 503 may receive a reverseinternal RBS interface information from the RE 501. In one example, thereverse internal RBS interface information may be a reverse CPRImessage. The first IWF 503 may encapsulate the reverse internal RBSinterface information and an RTM header to form a reverse packet. TheRTM header may also be referred to as an RTM frame. The RTM header mayinclude forward RTM information, reverse RTM information, forwardaccumulated RTM information, reverse accumulated RTM information, arunning difference between forward accumulated RTM information andreverse accumulated RTM information, or the like. The first IWF 503 maydetermine an RTM associated with a processing time of the first IWF 503from receiving the reverse internal RBS interface information totransmitting the reverse packet. Further, the first IWF 503 mayinitialize the reverse RTM information in the RTM header of the reversepacket using the RTM associated with the processing time of the firstIWF 503.

Furthermore, the first switch 505 may receive the reverse packet fromthe first IWF 503. The first switch 505 may determine an RTM associatedwith a processing time of the first switch 505 from receiving totransmitting the reverse packet. Further, the first switch 505 mayupdate the reverse RTM information of the reverse packet using the RTMassociated with the processing time of the first switch 505 to obtainthe reverse accumulated RTM information of the reverse packet.Similarly, the second switch 507 may receive the reverse packet from thefirst switch 505. The second switch 507 may determine an RTM associatedwith a processing time of the second switch 507 from receiving totransmitting the reverse packet. Further, the second switch 507 mayupdate the reverse accumulated RTM information of the reverse packetusing the RTM associated with the processing time of the second switch507.

In the current embodiment, the second IWF 509 may receive the reversepacket from the second switch 507. The second IWF 509 may decapsulatethe reverse packet to obtain the reverse internal RBS interfaceinformation and the RTM header. The second IWF 509 may determine an RTMassociated with a processing time of the second IWF 509 from receivingthe reverse packet to sending the reverse internal RBS interfaceinformation to the REC 511. Further, the second IWF 509 may update thereverse accumulated RTM information of the reverse packet using the RTMassociated with the processing time of the second IWF 509. The secondIWF 509 may use the reverse accumulated RTM information to determine apacket delay variation (PDV) compensation that compensates for the PDVof the reverse packet on the reverse link. In one example, the PDVcompensation may be relative to a predetermined delay. Further, thesecond IWF 509 may apply the PDV compensation to a transmission time ofthe reverse internal RBS interface information to obtain a compensatedtransmission time. The second IWF 509 may transmit the reverse internalRBS interface information to the REC 511 at the compensated transmissiontime.

In FIG. 5, the second IWF 509 may receive a forward internal RBSinterface information from the REC 511. In one example, the forwardinternal RBS interface information may be a forward CPRI message. Thesecond IWF 509 may encapsulate the forward internal RBS interfaceinformation and an RTM header to form a forward packet. The second IWF509 may determine an RTM associated with a processing time of the secondIWF 509 from receiving the forward internal RBS interface information tosending the forward packet. Further, the second IWF 509 may initializethe forward RTM information in the RTM header of the forward packetusing the RTM associated with the processing time of the forward packetby the second IWF 509. Also, the second IWF 509 may copy the reverseaccumulated RTM information from the RTM header of the correspondingreverse packet to the RTM header of the forward packet.

Furthermore, the second switch 507 may receive the forward packet fromthe second IWF 509. The second switch 507 may determine an RTMassociated with a processing time of the second switch 507 fromreceiving to transmitting the forward packet. Further, the second switch507 may update the forward RTM information of the forward packet usingthe RTM associated with the processing time of the second switch 507 toobtain a forward accumulated RTM information of the forward packet.Similarly, the first switch 505 may receive the forward packet from thesecond switch 507. The first switch 505 may determine an RTM associatedwith a processing time of the first switch 505 from receiving totransmitting the forward packet. Further, the first switch 505 mayupdate the forward accumulated RTM information of the forward packetusing the RTM associated with the processing time of the first switch505.

In the current embodiment, the first IWF 503 may receive the forwardpacket from the first switch 505. The first IWF 503 may decapsulate theforward packet to obtain the forward internal RBS interface informationand the RTM header. The first IWF 503 may determine an RTM associatedwith a processing time of the first IWF 503 from receiving the forwardpacket to transmitting the forward internal RBS interface information tothe RE 501. Further, the first IWF 503 may update the forwardaccumulated RTM information of the forward packet using the RTMassociated with the processing time of the first IWF 503. The first IWF503 may determine an asymmetry compensation that compensates for anasymmetry between processing times on the forward link and the reverselink between the RE and the REC. In one example, the asymmetrycompensation may be a difference between the forward accumulated RTMinformation and the reverse accumulated RTM information. The first IWF503 may apply the asymmetry compensation to a timestamp of the forwardinternal RBS interface information. The first IWF 503 may use theforward accumulated RTM information to determine a packet delayvariation (PDV) compensation that compensates for the PDV of the forwardpacket on the forward link. In one example, the PDV compensation may berelative to a predetermined delay. Further, the first IWF 503 may applythe PDV compensation to a transmission time of the forward internal RBSinterface information to obtain a compensated transmission time. Thefirst IWF 503 may transmit the forward internal RBS interfaceinformation to the REC 511 at the compensated transmission time.

FIG. 6 illustrates one embodiment of a first IWF 600 in accordance withvarious aspects as described herein. In FIG. 6, the first IWF 600 may beconfigured to include a processor 601 and a memory 603, and may includeadditional hardware, software or firmware. Further, the memory 603 mayinclude a forward buffer 621 and a reverse buffer 623. In one example,the additional hardware, software or firmware of the first IWF 600 mayinclude a first interface circuit, a second interface circuit, anencapsulator, a decapsulator, an RTM controller 613, a PDV and asymmetrycompensator 615, or the like. The first interface may be configured toallow the first IWF 600 to interface to the RE. The second interface maybe configured to allow the first IWF 600 to interface to a packetswitched network. The encapsulator may be used to encapsulate a networkheader, a PW header, an RTM header, a reverse internal RBS interfaceinformation, or the like. The network header may include an IP header,or the like. The PW header may include an MPLS header, an L2TPv3 header,or the like. The decapsulator may be used to analyze and remove thenetwork header and the PW header and to decapsulate the RTM header, aforward internal RBS interface information, and the like. The RTMcontroller 613 may be configured to perform any of the various RTMfunctions described herein. The PDV and asymmetry compensator 615 may beconfigured to perform any of the various PDV compensating functions orthe asymmetry compensating functions described herein.

In FIG. 6, the second interface may receive the forward packettransmitted from a second IWF. The decapsulator may decapsulate theforward packet to obtain the forward internal RBS interface informationand the RTM header. The RTM controller 613 may determine an RTMassociated with a processing time of the first IWF 600 from receivingthe forward packet to transmitting the forward internal RBS interfaceinformation to the RE. Further, the RTM controller 613 may update theforward accumulated RTM information of the forward packet using the RTMassociated with the processing time of the first IWF 600. The PDV andasymmetry compensator 615 may determine an asymmetry compensation thatcompensates for an asymmetry between processing times on the forwardlink and the reverse link between the RE and the REC. In one example,the asymmetry compensation may be a difference between the forwardaccumulated RTM information and the reverse accumulated RTM information.The PDV and asymmetry compensator 615 may apply the asymmetrycompensation to a timestamp of the forward internal RBS interfaceinformation. Alternatively, the PDV and asymmetry compensator 615 maydetermine an additive inverse of the forward accumulated RTM informationof the forward packet and may initialize the reverse accumulated RTMinformation of the reverse packet using the additive inverse of theforward accumulated RTM information.

In the current embodiment, the PDV and asymmetry compensator 615 may usethe forward accumulated RTM information to determine a PDV compensationthat compensates for the PDV of the forward packet on the forward link.In one example, the PDV compensation may be relative to a predetermineddelay. Further, the PDV and asymmetry compensator 615 may apply the PDVcompensation to a transmission time of the forward internal RBSinterface information from the forward buffer 621. The first IWF 600 maytransmit the forward internal RBS interface information to the REC atthe compensated transmission time.

FIG. 7 illustrates another embodiment of a second IWF 700 in accordancewith various aspects as described herein. In FIG. 7, the second IWF 700may be configured to include a processor 701 and a memory 703, and mayinclude additional hardware, software or firmware. Further, the memory703 may include a forward buffer 721 and a reverse buffer 723. In oneexample, the additional hardware, software or firmware of the second IWF700 may include a first interface circuit, a second interface circuit,an encapsulator, a decapsulator, an RTM controller 713, a PDV andasymmetry compensator 715, or the like. The first interface may beconfigured to allow the second IWF 700 to interface to the REC. Thesecond interface may be configured to allow the second IWF 700 tointerface to a packet switched network. The encapsulator may be used toencapsulate a network header, a PW header, an RTM header, a forwardinternal RBS interface information, or the like. The decapsulator may beused to analyze and remove the network header and the PW header and todecapsulate the RTM header, a reverse internal RBS interfaceinformation, and the like. The RTM controller 713 may be configured toperform any of the various RTM functions described herein. The PDV andasymmetry compensator 715 may be configured to perform any of thevarious PDV compensating functions or the asymmetry compensatingfunctions described herein.

In FIG. 7, the second IWF 700 may receive the reverse packet transmittedfrom a first IWF. The second IWF 700 may decapsulate the reverse packetto obtain the reverse internal RBS interface information and the RTMheader. The RTM controller 713 may determine an RTM associated with aprocessing time of the second IWF 700 from receiving the reverse packetto sending the reverse internal RBS interface information to the REC.Further, the RTM controller 713 may update the reverse accumulated RTMinformation of the reverse packet using the RTM associated with theprocessing time of the second IWF 700. The PDV and asymmetry compensator715 may determine an asymmetry compensation that compensates for anasymmetry between processing times on the forward link and the reverselink between the RE and the REC. In one example, the asymmetrycompensation may be a difference between the forward accumulated RTMinformation and the reverse accumulated RTM information. The PDV andasymmetry compensator 715 may apply the asymmetry compensation to atimestamp of the forward internal RBS interface information. The PDV andasymmetry compensator 715 may use the reverse accumulated RTMinformation to determine a packet delay variation (PDV) compensationthat compensates for the PDV of the reverse packet on the reverse link.Further, the PDV and asymmetry compensator 715 may apply the PDVcompensation to a transmission time of the reverse internal RBSinterface information from the reverse buffer 723. The second IWF 700may transmit the reverse internal RBS interface information to the RECat the compensated transmission time.

In order to use RTM over Virtual Circuit Connectivity Verification(VCCV) with Associated Channel Header (ACH) (such as defined in RFC 5085PW VCCV: A Control Channel for Pseudowires,https://tools.ietf.org/html/rfc5085), Ethernet PW must use PW CW in“Generic PW MPLS Control Word” format (such as defined in RFC 4385Pseudowire Emulation Edge-to-Edge (PWE3) Control Word for Use over anMPLS PSN https://tools.ietf.org/html/rfc4385). For example, FIG. 8provides a format of a residence time management (RTM) control message800 with a pseudo-wire associated channel header (PW ACH) in accordancewith various aspects as described herein. In FIG. 8, a first nibble 801of the message 800 may be set to binary ‘0001’ to indicate a channelassociated with an Ethernet PW. A Version field 803 of the message 800may be set to ‘0’, such as defined in RFC 4385 Pseudowire EmulationEdge-to-Edge (PWE3) Control Word for Use over an MPLS PSNhttps://tools.ietf.org/html/rfc4385. A Reserved field 805 of the message800 may be set to ‘0’ on transmit and may be ignored on receipt. An RTMChannel ID value 807 may be allocated by IANA. A Scratch Pad field 809may be eight octets. An optional Value field 815 may be used to carryoptional sub-TLVs or a packet of a given protocol such as a timesynchronization protocol. A Type field 811 may be used to identify atype of the Value field 815 that the TLV carries. The Length field 813may include the number of octets of the Value field 815. The message 800may be used for one-step operation.

A two-step operation may be applied in a similar way as used for PTP. Infact, the two-step operation may be applied to any L2 Client such asPTP. For example, FIG. 9 provides a format of a precision time protocol(PTP) sub-TLV message 900 that precedes a PTP packet carried in the RTMTLV message in accordance with various aspects as described herein. TheType field 901 of the message 900 may identify the PTP sub-TLV message900. The Length field 903 of the message 900 may contain a number ofoctets of a Value field and may be twenty. The Flags field 905 may beused to indicate a one-step operation or a two-step operation. The Typefield 901 may be used to identify, for instance, a PTP sub-TLV such asdefined in Table 19 Values of messageType field in IEEE 1588-2008, IEEEStandard for a Precision Clock Synchronization Protocol for NetworkedMeasurement and Control Systems,http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4579760. ThePort ID field 913 may be ten octets. Further, the Port ID field 913 maycontain an identity of a source port such as defined in IEEE 1588-2008,IEEE Standard for a Precision Clock Synchronization Protocol forNetworked Measurement and Control Systems,http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4579760. TheSequence ID field 915 may be a sequence ID of a PTP message carried inthe Value field of the message.

FIG. 10 provides a format of a Flags field 1000 of the PTP sub-TLV ofFIG. 9 in accordance with various aspects as described herein. The Flagsfield 1000 may define an S-bit 1001. The S-bit 1001 may be used todetermine whether a current message has been processed by a one-stepoperation or a two-step operation. For instance, the S-bit 1001 may becleared if the current message has been handled exclusively using theone-step operation and there is no follow-up message. Alternatively, theS-bit 1001 may be set if there has been at least one two-step operationand a follow-up message is forthcoming.

In another embodiment, for a CPRI flow, a sub-TLV message may be used ina similar way to allow one-step operation or two-step operation. In thiscase, a “follow-up” message may be used, where a Sequence ID field and aCPRI Flow identifier field may allow an association between a residencetime and a related CPRI packet. For instance, a CPRI flow identifier maybe generated by an IWF and may be associated to a specific CPRI flowsuch as by using a MAC SA or a VID.

FIG. 11 illustrates another embodiment of an RBS system transportinginternal RBS interface information over a packet switched network inaccordance with various aspects as described herein. In FIG. 11, thesystem 1100 may be configured to include an RE 1101, a first IWF 1103, afirst switch 1105, a second switch 1107, a second IWF 1109 and an REC1111. The RE 1101 may be operationally coupled to the first IWF 1103,which may also be referred to as the first IWF 1103 being attached tothe RE 1101. Further, the REC 1111 may be operationally coupled to thesecond IWF 1109, which may also be referred to as the second IWF 1109being attached to the REC 1111. The first IWF 1103 and the second IWF1109 may be operationally coupled using a first switch 1105 and a secondswitch 1107 of the packet network. The first switch 1105 and the secondswitch 1107 may be used to facilitate packet communications between thefirst IWF 1103 and the second IWF 1109. The first and second IWFs 1103and 1109 and the first and second switches 1105 and 1107 may use RTM.The first and second IWFs 1103 and 1109 may be standalone devices.However, the RE 1101 may be configured to include the first IWF 1103 andmay share resources such as a processor or a memory. Similarly, the REC1111 may be configured to include the second IWF 1109 and may shareresources such as a processor and a memory.

In FIG. 11, in operation, the first IWF 1103 may receive a reverseinternal RBS interface information from the RE 1101. In one example, thereverse internal RBS interface information may be a reverse CPRImessage. The first IWF 1103 may encapsulate the reverse internal RBSinterface information and an RTM header to form a reverse packet. TheRTM header may include forward RTM information, reverse RTM information,forward accumulated RTM information, reverse accumulated RTMinformation, a running difference between forward accumulated RTMinformation and reverse accumulated RTM information or the like. Thereverse internal RBS interface information may include a timestampcorresponding to a time that the RE 1101 received data associated withthe reverse internal RBS interface information over an air interface.The first IWF 1103 may determine an RTM associated with a processingtime of the first IWF 1103 from receiving the reverse internal RBSinterface information to transmitting the reverse packet. Further, thefirst IWF 1103 may initialize the reverse RTM information in the RTMheader of the reverse packet using the RTM associated with theprocessing time of the first IWF 1103.

Furthermore, the first switch 1105 may receive the reverse packet fromthe first IWF 1103. The first switch 1105 may determine an RTMassociated with a processing time of the first switch 1105 fromreceiving to transmitting the reverse packet. Further, the first switch1105 may update the reverse RTM information of the reverse packet usingthe RTM associated with the processing time of the first switch 1105 toobtain the reverse accumulated RTM information of the reverse packet.Similarly, the second switch 1107 may receive the reverse packet fromthe first switch 1105. The second switch 1107 may determine an RTMassociated with a processing time of the second switch 1107 fromreceiving to transmitting the reverse packet. Further, the second switch1107 may update the reverse accumulated RTM information of the reversepacket using the RTM associated with the processing time of the secondswitch 1107.

In the current embodiment, the second IWF 1109 may receive the reversepacket from the second switch 1107. The second IWF 1109 may decapsulatethe reverse packet to obtain the reverse internal RBS interfaceinformation and the RTM header. The second IWF 1109 may determine an RTMassociated with a processing time of the second IWF 1109 from receivingthe reverse packet to sending the reverse internal RBS interfaceinformation to the REC 1111. Further, the second IWF 1109 may update thereverse accumulated RTM information of the reverse packet using the RTMassociated with the processing time of the second IWF 1109. The secondIWF 1109 may use the reverse accumulated RTM information to determine aPDV compensation that compensates for the PDV of the reverse packet onthe reverse link. Further, the second IWF 1109 may apply the PDVcompensation to a transmission time of the reverse internal RBSinterface information to obtain a compensated transmission time. Thesecond IWF 1109 may transmit the reverse internal RBS interfaceinformation to the REC 1111 at the compensated transmission time.

In FIG. 11, the second IWF 1109 may receive a forward internal RBSinterface information from the REC 1111. In one example, the forwardinternal RBS interface information may be a forward CPRI message. Thesecond IWF 1109 may encapsulate the forward internal RBS interfaceinformation and an RTM header to form a forward packet. The second IWF1109 may determine an RTM associated with a processing time of thesecond IWF 1109 from receiving the forward internal RBS interfaceinformation to sending the forward packet. Further, the second IWF 1109may initialize the forward RTM information in the RTM header of theforward packet using the RTM associated with the processing time of theforward packet by the second IWF 1109. The second IWF 1109 may determinean additive inverse of the reverse accumulated RTM information of theRTM header of the corresponding reverse packet. Further, the second IWF1109 may initialize the reverse accumulated RTM information in the RTMheader of the forward packet using the additive inverse of the reverseaccumulated RTM information of the corresponding reverse packet.

Furthermore, the second switch 1107 may receive the forward packet fromthe second IWF 1109. The second switch 1107 may determine an RTMassociated with a processing time of the second switch 1107 fromreceiving to transmitting the forward packet. Further, the second switch1107 may update the forward RTM information in the RTM header of theforward packet using the RTM associated with the processing time of thesecond switch 1107 to obtain a forward accumulated RTM information ofthe forward packet. Further, the second switch 107 may update thedifference between the forward accumulated RTM information and thereverse accumulated RTM information in the RTM header using the RTMassociated with the processing time of the second switch 1107.

Similarly, the first switch 1105 may receive the forward packet from thesecond switch 1107. The first switch 1105 may determine an RTMassociated with a processing time of the first switch 1105 fromreceiving to transmitting the forward packet. Further, the first switch1105 may update the forward accumulated RTM information in the RTMheader of the forward packet using the RTM associated with theprocessing time of the first switch 1105. Further, the first switch 105may update the difference between the forward accumulated RTMinformation and the reverse accumulated RTM information in the RTMheader of the forward packet using the RTM associated with theprocessing time of the first switch 1105.

In the current embodiment, the first IWF 1103 may receive the forwardpacket from the first switch 1105. The first IWF 1103 may decapsulatethe forward packet to obtain the forward internal RBS interfaceinformation and the RTM header. The first IWF 1103 may determine an RTMassociated with a processing time of the first IWF 1103 from receivingthe forward packet to transmitting the forward internal RBS interfaceinformation to the RE 1101. Further, the first IWF 1103 may update theforward accumulated RTM information in the RTM header of the forwardpacket using the RTM associated with the processing time of the firstIWF 1103. Also, the first IWF 1103 may update the difference between theforward accumulated RTM information and the reverse accumulated RTMinformation in the RTM header of the forward packet using the RTMassociated with the processing time of the first IWF 1103.

In addition, the first IWF 1103 may determine an asymmetry compensationthat compensates for an asymmetry between processing times on theforward link and the reverse link between the RE and the REC. Theasymmetry compensation may be the difference between the forwardaccumulated RTM information and the reverse accumulated RTM information.The first IWF 1103 may apply the asymmetry compensation to the timestampof the forward internal RBS interface information. The first IWF 1103may use the forward accumulated RTM information to determine a packetdelay variation (PDV) compensation that compensates for the PDV of theforward packet on the forward link. In one example, the PDV compensationmay be relative to a predetermined delay. Further, the first IWF 1103may apply the PDV compensation to a transmission time of the forwardinternal RBS interface information to obtain a compensated transmissiontime. The first IWF 1103 may transmit the forward internal RBS interfaceinformation to the REC 1111 at the compensated transmission time.

FIG. 12 illustrates another embodiment of an IWF 1200 with variousaspects as described herein. In FIG. 12, the IWF 1200 may be configuredto include a processor 1201 and a memory 1203 and may include additionalhardware, software or firmware. In one example, the additional hardware,software or firmware of the IWF 1200 may include a first interfacecircuit 1205, a second interface circuit 1207, an encapsulator 1209, adecapsulator 1211, an RTM controller 1213, a PDV and asymmetrycompensator 1215, or the like. The first interface 1205 may beconfigured to allow the IWF 1200 to interface to the RE or the REC. Thesecond interface may be configured to allow the IWF 1200 to interface toa packet switched network. The encapsulator 1209 may be used toencapsulate a network header, a PW header, an RTM header, internal RBSinterface information, or the like. The network header may include an IPheader, or the like. The PW header may include an MPLS header, an L2TPv3header, or the like. The decapsulator 1211 may be used to analyze andremove the network header and the PW header and to decapsulate the RTMheader, the internal RBS interface information, and the like. The RTMcontroller 1213 may be configured to perform any of the various RTMfunctions described herein. The PDV and asymmetry compensator 1215 maybe configured to perform any of the various PDV compensating functionsor the asymmetry compensating functions described herein.

FIG. 13 provides one embodiment of a method 1300 of communicatingpackets between an RE and an REC of an RBS in accordance with variousaspects as described herein. In FIG. 13, the method 1300 may beperformed by an IWF for communicating packets between an RE and an RECof an RBS. Further, the method 1300 may start, for instance, at block1301 where it may include receiving a packet sent from another IWF andhaving internal RBS interface information and residence time measurement(RTM) information that characterizes an asymmetry between processingtimes on links in different directions between the RE and the REC and apacket delay variation (PDV) of the packet. At block 1303, the method1300 may include determining an RTM associated with the IWF processingthe packet. At block 1305, the method 1300 may include updating the RTMinformation of the packet using the RTM associated with the IWFprocessing the packet. At block 1307, the method 1300 may includedetermining an asymmetry compensation that compensates the asymmetryusing the RTM information. At block 1309, the method 1300 may includeapplying the asymmetry compensation to a timestamp of the internal RBSinterface information to obtain an updated internal RBS interfaceinformation. At block 1311, the method may include determining a PDVcompensation that compensates for a PDV of the packet using the RTMinformation of the packet. At block 1313, the method 1300 may includeapplying the PDV compensation to a transmission time of the updatedinternal RBS interface information to obtain a compensated transmissiontime. At block 1315, the method 1300 may include transmitting theupdated internal RBS interface information at the compensatedtransmission time to one of the RE and the REC that is attached to theIWF.

FIG. 14 provides another embodiment of a method 1400 of communicatingpackets between an RE and an REC of an RBS in accordance with variousaspects as described herein. In FIG. 14, the method 1400 may beperformed by a first IWF for communicating packets between an RE and anREC of an RBS. Further, the method 1400 may start, for instance, atblock 1401 where it may include receiving a forward packet sent from thesecond IWF and having a forward RTM information that characterizes a PDVof the forward packet on a forward link. At block 1403, the method 1400may include determining an RTM associated with the first IWF processingthe forward packet. At block 1405, the method 1400 may include updatingthe forward RTM information of the forward packet using the RTMassociated with the first IWF processing the forward packet. At block1407, the method 1400 may include determining a PDV compensation thatcompensates the PDV of the forward packet on the forward link using theforward RTM information. At block 1409, the method 1400 may includeapplying the PDV compensation to a transmission time of the forwardinternal RBS interface information to obtain a compensated transmissiontime. At block 1411, the method 1400 may include transmitting, to theRE, the updated forward internal RBS interface information at thecompensated transmission time.

FIG. 15 provides another embodiment of a method 1500 of communicatingpackets between an RE and an REC of an RBS in accordance with variousaspects as described herein. In FIG. 15, the method 1500 may beperformed by a second IWF for communicating packets between an RE and anREC of an RBS. Further, the method 1500 may start, for instance, atblock 1501 where it may include receiving a reverse packet sent from thefirst IWF and having a reverse RTM information that characterizes a PDVof the reverse packet on a reverse link. At block 1503, the method 1500may include determining an RTM associated with the second IWF processingthe reverse packet. At block 1505, the method 1500 may include updatingthe reverse RTM information of the reverse packet using the RTMassociated with the second IWF processing the reverse packet. At block1507, the method 1500 may include determining a PDV compensation thatcompensates the PDV of the reverse packet on the reverse link using thereverse RTM information. At block 1509, the method 1500 may includeapplying the PDV compensation to a transmission time of the reverseinternal RBS interface information to obtain a compensated transmissiontime. At block 1511, the method 1500 may include transmitting, to theREC, the updated reverse internal RBS interface information at thecompensated transmission time.

FIG. 16 provides another embodiment of a method 1600 of communicatingpackets between an RE and an REC of an RBS in accordance with variousaspects as described herein. In FIG. 16, the method 1600 may beperformed by a switch for communicating packets between an RE and an RECof an RBS using a first IWF and a second IWF. Further, the method 1600may start, for instance, at block 1601 where it may include receivingthe forward packet sent from the second IWF. At block 1603, the methodmay include determining an RTM associated with the switch processing theforward packet. At block 1605, the method may include updating a forwardRTM information of the forward packet using the RTM associated with theswitch processing the forward packet. At block 1607, the method 1600 mayinclude transmitting, towards the first IWF, the forward packet havingthe updated forward RTM information. At block 1609, the method 1600 mayinclude receiving the reverse packet sent from the first IWF. At block1611, the method 1600 may include determining an RTM associated with theswitch processing the reverse packet. At block 1613, the method 1600 mayinclude updating the reverse RTM information of the reverse packet usingthe RTM associated with the switch processing the reverse packet. Atblock 1615, the method 1600 may include transmitting, towards the secondIWF, the reverse packet having the updated reverse RTM information.

In another embodiment, in an interworking function (IWF) forcommunicating packets between a radio equipment (RE) and a radioequipment controller (REC) of a radio base station (RBS), a method mayinclude receiving a packet sent from another IWF and having internal RBSinterface information and residence time measurement (RTM) informationthat characterizes an asymmetry between processing times on links indifferent directions between the RE and the REC. Further, the method mayinclude determining an asymmetry compensation that compensates for theasymmetry using the RTM information. Also, the method may includeapplying the asymmetry compensation to a timestamp of the internal RBSinterface information to obtain an updated internal RBS interfaceinformation. In addition, the method may include transmitting theupdated internal RBS interface information to one of the RE and the RECthat is attached to the IWF.

In another embodiment, asymmetry compensation may be applied by delayinga transmission of the internal RBS interface information by about theasymmetry compensation.

In another embodiment, asymmetry compensation may be applied to atransmission time of internal RBS interface information to obtain acompensated transmission time. Further, the internal RBS interfaceinformation may be transmitted to the RE or the REC at the compensatedtransmission time.

In another embodiment, the method may include determining an RTMassociated with the IWF processing the packet. Further, the method mayinclude updating the RTM information of the packet using the RTMassociated with the IWF processing the packet.

In another embodiment, the method may include determining a PDVcompensation that compensates a PDV of the packet using the RTMinformation of the packet. The RTM information may also characterizesthe PDV of the packet on a link from the other IWF to the IWF. Further,the method may include applying the PDV compensation to a transmissiontime of the updated internal RBS interface information to obtain anupdated transmission time. Also, the method may include transmitting theupdated internal RBS interface information at the compensatedtransmission time to the one of the RE and the REC that is attached tothe IWF.

In another embodiment, the internal RBS interface information mayinclude CPRI information.

In another embodiment, the packet may include PTP information.

In another embodiment, the IWF may not use a precision time protocol(PTP).

In another embodiment, the packet may include an RTM header having theRTM information of the packet.

In another embodiment, the packet may be a PW emulation packet.

In another embodiment, the RTM information of the packet may include aforward accumulated RTM and a reverse accumulated RTM, or a differencebetween the forward accumulated RTM and the reverse accumulated RTM andone of the forward accumulated RTM and the reverse accumulated RTM.

In another embodiment, an IWF for communicating packets between an REand an REC of an RBS may be configured to include a processoroperationally coupled to a first interface circuit and a secondinterface circuit. The first interface circuit may be configured toreceive a packet sent from another IWF and having an internal RBSinterface information and an RTM information that characterizes anasymmetry between processing times on links in different directionsbetween the RE and the REC. Further, the processor may be configured todetermine the asymmetry compensation that compensates the asymmetryusing the RTM information. The processor may be further configured toapply the asymmetry compensation to a timestamp of the internal RBSinterface information to obtain an updated internal RBS interfaceinformation. Also, the second interface circuit may be configured totransmit the updated internal RBS interface information to one of the REand the REC that is attached to the IWF.

In another embodiment, the processor may be further configured todetermine an RTM associated with the IWF processing the packet. Further,the processor may be further configured to update the RTM information ofthe packet using the RTM associated with the IWF processing the packet.

In another embodiment, the processor may be further configured todetermine a PDV compensation that compensates a PDV of the packet usingthe RTM information of the packet. The RTM information may alsocharacterize the PDV of the packet on a link from the other IWF to theIWF. Further, the processor may be configured to apply the PDVcompensation to a transmission time of the updated internal RBSinterface information to obtain a compensated transmission time.

In another embodiment, the second interface circuit may be furtherconfigured to transmit the updated internal RBS interface information atthe compensated transmission time to the one of the RE and the REC thatis attached to the IWF.

In another embodiment, a system for communicating packets between an REand an REC of an RBS may be configured to include a first IWFoperationally coupled to the RE and a second IWF operationally coupledbetween the first IWF and the REC. The first IWF may be configured toreceive a forward packet transmitted from the second IWF having aforward internal RBS interface information and a forward RTM informationthat characterizes a forward PDV of the forward packet on a forwardlink. In addition, the first IWF may be further configured to determinea forward PDV compensation that compensates for the forward PDV usingthe forward RTM information. The first IWF may be further configured toapply the forward PDV compensation to a forward transmission time of theforward internal RBS interface information to obtain a compensatedforward transmission time. Also, the first IWF may be further configuredto transmit, to the RE, the updated forward internal RBS interfaceinformation at the compensated forward transmission time. The second IWFmay be configured to receive a reverse packet sent from the first IWFand having a reverse internal RBS interface information and a reverseRTM information that characterizes a reverse PDV of the reverse packeton a reverse link. In addition, the second IWF may be further configuredto determine a reverse PDV compensation that compensates for the reversePDV using the reverse RTM information. Also, the second IWF may befurther configured to apply the reverse PDV compensation to a reversetransmission time of the reverse internal RBS interface information toobtain a compensated reverse transmission time. The second IWF may beconfigured to transmit, to the REC, the updated reverse internal RBSinterface information at the compensated reverse transmission time.

In another embodiment, the first IWF may be further configured todetermine an RTM associated with the first IWF processing the forwardpacket. In addition, the first IWF may be further configured to updatethe forward RTM information of the forward packet using the RTMassociated with the first IWF processing the forward packet. The firstIWF may be further configured to determine an RTM associated with thefirst IWF processing the reverse packet. Also, the first IWF may befurther configured to update the reverse RTM information of the reversepacket using the RTM associated with the first IWF processing thereverse packet.

In another embodiment, the second IWF may be further configured todetermine an RTM associated with the second IWF processing the forwardpacket. In addition, the second IWF may be further configured to updatethe forward RTM information of the forward packet using the RTMassociated with the second IWF processing the forward packet. The secondIWF may be further configured to determine an RTM associated with thesecond IWF processing the reverse packet. Also, the second IWF may befurther configured to update the reverse RTM information of the reversepacket using the RTM associated with the second IWF processing thereverse packet.

In another embodiment, the system may be further configured to include aswitch operationally coupled between the first IWF and the second IWF.The switch may be configured to receive the forward packet sent from thesecond IWF. In addition, the switch may be further configured todetermine an RTM associated with the switch processing the forwardpacket. The switch may be further configured to update the forward RTMinformation of the forward packet using the RTM associated with theswitch processing the forward packet. Also, the switch may be furtherconfigured to transmit, towards the first IWF, the forward packet havingthe updated forward RTM information.

In another embodiment, the system may be further configured to include aswitch operationally coupled between the first IWF and the second IWF.The switch may be configured to receive the reverse packet sent from thefirst IWF. In addition, the switch may be further configured todetermine an RTM associated with the switch processing the reversepacket. The switch may be further configured to update the reverse RTMinformation of the reverse packet using the RTM associated with theswitch processing the reverse packet. Also, the switch may be furtherconfigured to transmit, towards the second IWF, the reverse packethaving the updated reverse RTM information.

In another embodiment, the RTM information may also characterizes anasymmetry between processing times on links in different directionsbetween the RE and the REC.

In another embodiment, the first IWF may be further configured todetermine an asymmetry compensation that compensates the asymmetry usingthe forward RTM information. In addition, the first IWF may be furtherconfigured to apply the asymmetry compensation to a timestamp of theupdated forward internal RBS interface information.

In another embodiment, the second IWF may be further configured todetermine an asymmetry compensation that compensates the asymmetry usingthe reverse RTM information. In addition, the second IWF may be furtherconfigured to apply the asymmetry compensation to a timestamp of theupdated reverse internal RBS interface information.

In another embodiment, an REC may transmit to an RE an accumulatedreverse RTM information associated with a reverse internal RBS interfaceinformation to allow the RE to determine a PDV compensation or anasymmetry compensation associated with a corresponding forward internalRBS interface information.

In another embodiment, an RE may transmit to an REC an accumulatedforward RTM information associated with a forward internal RBS interfaceinformation to allow the REC to determine a PDV compensation or anasymmetry compensation associated with a corresponding reverse internalRBS interface information.

FIG. 17 provides an example application of one embodiment of a system1700 for using accumulated residence time to shape packet traffic andreduce packet delay variation in accordance with various aspects asdescribed herein. In FIG. 17, the system 1700 shows that accumulatedresidence time may be used to shape packet traffic and reduce delayvariation. A residence time may be measured at each packet switch 1701,1703 and 1705 in a packet-switched network as the difference betweenpacket arrival time at a given switch and packet departure time for thesame packet from the same switch. Accumulated residence time may bemeasured by adding the locally measured residence time to a field of acorresponding packet that contains the sum of residence times of allprior switches on a unidirectional path. When a packet reaches the endof a residence time domain, the field of the packet may contain thecumulative residence time for each packet switch 1701, 1703 and 1705 onthe path. On a given path, there may be two components of delay. A firstdelay may be a propagation delay such as a light speed delay. A seconddelay may be a variable delay such as a processing time (e.g., RT-A,RT-B and RT-C) for processing, handling, managing, buffering, or thelike a packet in a packet switch. Further, a switch residence time mayinclude all of the variable delay components for the switch. Anaccumulated residence time (ART) may include all of the variable delays(e.g., RT-A+RT-B+RT-C) across all residence time measuring switches1701, 1703 and 1705 on a path (in an RTM domain). Shaping may beperformed using the ART, for instance, by adjusting or normalizing thedelay. Over time, all packets may experience precisely similar delay.Hence, delay variation may then be at a minimum.

FIG. 18 provides an example application of one embodiment of a system1800 for using accumulated residence time to shape packet traffic andreduce packet delay variation in accordance with various aspects asdescribed herein. As shown in FIG. 18, shaping may be used to spreadpackets out uniformly to achieve an even distribution in time accordingto a determined delivery rate. For example, typical shaping may be usedto ensure that a delivery rate of a packet does not exceed a maximumdelivery rate measured over a predetermined time. Shaping may also beused with gradually changing packet arrival rates to minimize effects of“burstiness” in traffic. Shaping may be done by a switch 1801 addingdelay in delivering each packet in a series of packets to achieve a moreeven distribution in time. Shaping may also be performed by the switch1801 to match a common delay.

In FIG. 18, packets cannot depart from the switch 1801 faster than theyarrive. Thus, to achieve as near zero delay variation as possible,packets must be delayed by the switch 1801 an amount greater than orequal to zero. The amount of delay for each packet may be an amountrequired to result in a total delay being about equivalent to themaximum delay experienced by any packet delivered by the switch 1801 aspart of a stream of packets on a given path. It is important torecognize that a packet, which directly observes the maximum delay,cannot experience less delay through shaping.

In another embodiment, in response to a first packet arriving, a devicesuch as a switch or IFW may store an ART of the first packet as amaximum ART and may transmit the packet immediately (with about delayzero time). However, the first packet may be delayed by some amount,which may be a predetermined amount. If the configured minimum delay isgreater than the ART of the first packet, then (1) store the minimumdelay as the initial value for the maximum ART, (2) wait the amount oftime representing a difference between the ART of the first packet andthe maximum ART; and (3) transmit the first packet. Otherwise, if theconfigured minimum delay is no more than the ART of the first packet,then store the ART of the first packet as the maximum ART and transmitthe first packet immediately. As a subsequent packet arrives, compare anART of the subsequent packet to the maximum ART. If the ART of thesubsequent packet is greater than the maximum ART, then store the ART ofthe subsequent packet at the maximum ART, and transmit the subsequentpacket immediately. Otherwise, if the ART of the subsequent packet is nomore than the maximum ART, then (1) determine a difference between theART of the subsequent packet and the maximum ART, (2) wait the amount oftime represented by the difference, and (3) transmit the subsequentpacket.

In another embodiment, an initial value may be configured for themaximum ART before any packets arrive. The maximum ART may be anythingfrom zero to a maximum acceptable delay. As a subsequent packet arrives,an ART of the subsequent packet may be compared to the maximum ART. Ifthe ART of the subsequent packet is greater than the maximum ART, thenstore the ART of the subsequent packet as the maximum ART, and transmitthe subsequent packet immediately. Otherwise, if the ART of thesubsequent packet is no more than the maximum ART, then (1) determine adifference between the ART of the subsequent packet and the maximum ART,(2) wait an amount of time representing the difference, and (3) transmitthe subsequent packet.

In another embodiment, an initial value may be configured for a maximumART and a maximum acceptable delay before any packets arrive. Theinitial value of the maximum ART may be anything from zero to theconfigured maximum acceptable delay. A value of the maximum acceptabledelay may be determined based on a delay budget dictated by anapplication, if any. As a subsequent packet arrives, an ART of thesubsequent packet may be compared to the maximum ART. If the ART of thesubsequent packet is greater than the maximum ART, then (1) compare theART of the subsequent packet to the maximum acceptable delay, (2) if theART of the subsequent packet is no more than the maximum acceptabledelay, then store the ART of the subsequent packet as a new value of themaximum ART, and (3) transmit the subsequent packet immediately.Otherwise, if the ART of the subsequent packet is no more the maximumART, then (1) determine a difference between the ART of the subsequentpacket and the maximum ART, wait an amount of time represented by thedifference, and (3) transmit the packet.

In another embodiment, an initial value may be configured for a maximumART and a maximum acceptable delay before any packets arrive. Theinitial value for the maximum ART may be anything from zero to theconfigured maximum acceptable delay. The value of the maximum acceptabledelay may be determined based on a delay budget dictated by anapplication, if any. As a subsequent packet arrives, an ART of thesubsequent packet may be compared to the maximum ART. If the ART of thesubsequent packet is greater than the maximum ART, then (1) compare theART of the subsequent packet to the maximum acceptable delay, (2) if theART of the subsequent packet is no more than the maximum acceptabledelay, then store the ART of the subsequent packet as a new value of themaximum ART, and (3) transmit the subsequent packet immediately.Otherwise, if the ART of the subsequent packet is no more than themaximum ART, then (1) determine a difference between the ART of thesubsequent packet and the maximum ART, (2) wait an amount of timerepresented by the difference, and (3) transmit the subsequent packet.

These embodiments for shaping packet traffic using ART may beindependent of the approach used to correct for path delay asymmetry. Ifused in conjunction with asymmetry correction, these embodiments mayneed to be modified for the opposite path such as the reverse path.These embodiments used to determine asymmetry may result in an ART thatis less than zero for the opposite path. The ART value in this case maybe “poisoned” since it is influenced by the value of ART carried forwardfrom the forward portion of the path. Hence, the IWF may need to treattwo-way delay measurement PDUs differently from other PDUs. Theseembodiments may be further enhanced. For instance, a function can beadded to determine if reducing the maximum ART would make sense such asif the maximum ART has increased due to a short term packet congestioncondition.

Abbreviations:

CPRI Common Public Radio Interface

MAC SA Media Access Control Source Address

PDV Packet Delay Variation

PSN Packet Switched Network

PTP Precision Time Protocol

RTM Residence Time Measurement

VID VLAN Id

The previous detailed description is merely illustrative in nature andis not intended to limit the present disclosure, or the application anduses of the present disclosure. Furthermore, there is no intention to bebound by any expressed or implied theory presented in the precedingfield of use, background, summary, or detailed description. The presentdisclosure provides various examples, embodiments and the like, whichmay be described herein in terms of functional or logical blockelements. The various aspects described herein are presented as methods,devices (or apparatus), systems, or articles of manufacture that mayinclude a number of components, elements, members, modules, nodes,peripherals, or the like. Further, these methods, devices, systems, orarticles of manufacture may include or not include additionalcomponents, elements, members, modules, nodes, peripherals, or the like.References to “one embodiment,” “an embodiment,” “example embodiment,”“various embodiments,” and other like terms indicate that theembodiments of the disclosed technology so described may include aparticular function, feature, structure, or characteristic, but notevery embodiment necessarily includes the particular function, feature,structure, or characteristic. Further, repeated use of the phrase “inone embodiment” does not necessarily refer to the same embodiment,although it may.

Furthermore, the various aspects described herein may be implementedusing standard programming or engineering techniques to producesoftware, firmware, hardware, or any combination thereof to control acomputing device to implement the disclosed subject matter. The term“article of manufacture” as used herein is intended to encompass acomputer program accessible from any computing device, carrier, ormedia. For example, a computer-readable medium may include: a magneticstorage device such as a hard disk, a floppy disk or a magnetic strip;an optical disk such as a compact disk (CD) or digital versatile disk(DVD); a smart card; and a flash memory device such as a card, stick orkey drive. Additionally, it should be appreciated that a carrier wavemay be employed to carry computer-readable electronic data includingthose used in transmitting and receiving electronic data such aselectronic mail (e-mail) or in accessing a computer network such as theInternet or a local area network (LAN). Of course, a person of ordinaryskill in the art will recognize many modifications may be made to thisconfiguration without departing from the scope or spirit of the claimedsubject matter.

Throughout the specification and the claims, the following terms take atleast the meanings explicitly associated herein, unless the contextclearly dictates otherwise. Relational terms such as “first” and“second,” and the like may be used solely to distinguish one entity oraction from another entity or action without necessarily requiring orimplying any actual such relationship or order between such entities oractions. The term “or” is intended to mean an inclusive “or” unlessspecified otherwise or clear from the context to be directed to anexclusive form. Further, the terms “a,” “an,” and “the” are intended tomean one or more unless specified otherwise or clear from the context tobe directed to a singular form. The term “include” and its various formsare intended to mean including but not limited to.

It is important to recognize that it is impractical to describe everyconceivable combination of components or methodologies for purposes ofdescribing the claimed subject matter. However, a person having ordinaryskill in the art will recognize that many further combinations andpermutations of the subject innovations are possible. Accordingly, theclaimed subject matter is intended to cover all such alterations,modifications and variations that are within the spirit and scope of theclaimed subject matter.

What is claimed is:
 1. A method performed by an interworking function(IWF) for communicating packets between a radio equipment (RE) and aradio equipment controller (REC) of a radio base station (RBS),comprising: receiving a packet sent from another IWF and having internalRBS interface information and residence time measurement (RTM)information that characterizes an asymmetry between processing times onlinks in different directions between the RE and the REC; determining anasymmetry compensation that compensates for the asymmetry using the RTMinformation; and applying the asymmetry compensation to a timestamp ofthe internal RBS interface information to obtain an updated internal RBSinterface information; and transmitting the updated internal RBSinterface information to one of the RE and the REC that is attached tothe IWF.
 2. The method of claim 1, further comprising: determining anRTM associated with the IWF processing the packet; and updating the RTMinformation of the packet using the RTM associated with the IWFprocessing the packet.
 3. The method of claim 1, further comprising:determining a packet delay variation (PDV) compensation that compensatesa PDV of the packet using the RTM information of the packet, wherein theRTM information also characterizes the PDV of the packet on a link fromthe other IWF to the IWF; applying the PDV compensation to atransmission time of the updated internal RBS interface information toobtain an updated transmission time; and wherein transmitting includestransmitting the updated internal RBS interface information at thecompensated transmission time to the one of the RE and the REC that isattached to the IWF.
 4. The method of claim 1, wherein the internal RBSinterface information includes common public radio interface (CPRI)information.
 5. The method of claim 1, wherein the packet includesprecision time protocol (PTP) information.
 6. The method of claim 1,wherein the packet includes an RTM header having the RTM information ofthe packet.
 7. The method of claim 1, wherein the packet is apseudo-wire emulation packet.
 8. The method of claim 1, wherein the RTMinformation of the packet includes a forward accumulated RTM and areverse accumulated RTM, or a difference between the forward accumulatedRTM and the reverse accumulated RTM.
 9. The method of claim 1, whereinthe IWF does not use a precision time protocol (PTP).
 10. Aninterworking function (IWF) for communicating packets between a radioequipment (RE) and a radio equipment controller (REC) of a radio basestation (RBS), comprising: a first interface circuit configured toreceive a packet sent from another IWF and having internal RBS interfaceinformation and a residence time measurement (RTM) information thatcharacterizes an asymmetry between processing times on links indifferent directions between the RE and the REC; a processoroperationally coupled to the first interface and configured to:determine the asymmetry compensation that compensates the asymmetryusing the RTM information; and apply the asymmetry compensation to atimestamp of the internal RBS interface information to obtain an updatedinternal RBS interface information; and a second interface circuitoperationally coupled to the processor and configured to transmit theupdated internal RBS interface information to one of the RE and the RECthat is attached to the IWF.
 11. The IWF of claim 10, wherein theprocessor is further configured to: determine an RTM associated with theIWF processing the packet; and update the RTM information of the packetusing the RTM associated with the IWF processing the packet.
 12. The IWFof claim 10, wherein the processor is further configured to: determine apacket delay variation (PDV) compensation that compensates a PDV of thepacket using the RTM information of the packet, wherein the RTMinformation also characterizes the PDV of the packet on a link from theother IWF to the IWF; and apply the PDV compensation to a transmissiontime of the updated internal RBS interface information to obtain acompensated transmission time; and wherein the second interface circuitis further configured to transmit the updated internal RBS interfaceinformation at the compensated transmission time to the one of the REand the REC that is attached to the IWF.
 13. The IWF of claim 10,wherein the RTM information of the packet includes a forward accumulatedRTM and a reverse accumulated RTM, or a difference between the forwardaccumulated RTM and the reverse accumulated RTM.
 14. The IWF of claim10, wherein the internal RBS interface information includes commonpublic radio interface (CPRI) information.
 15. The IWF of claim 10,wherein the packet includes an RTM header having the RTM information.16. A system for communicating packets between a radio equipment (RE)and a radio equipment controller (REC) of a radio base station (RBS),comprising: a first interworking function (IWF) operationally coupled tothe RE; a second IWF operationally coupled between the first IWF and theREC; wherein the first IWF is configured to: receive a forward packetsent from the second IWF and having a forward internal RBS interfaceinformation and a forward residence time measurement (RTM) informationthat characterizes a forward packet delay variation (PDV) of the forwardpacket on a forward link; determine a forward PDV compensation thatcompensates for the forward PDV using the forward RTM information; applythe forward PDV compensation to a forward transmission time of theforward internal RBS interface information to obtain a compensatedforward transmission time; and transmit, to the RE, the updated forwardinternal RBS interface information at the compensated forwardtransmission time; and a second IWF operationally coupled between thefirst IWF and the REC, wherein the second IWF is configured to: receivea reverse packet sent from the first IWF and having a reverse internalRBS interface information and a reverse RTM information thatcharacterizes a reverse PDV of the reverse packet on a reverse link;determine a reverse PDV compensation that compensates for the reversePDV using the reverse RTM information; apply the reverse PDVcompensation to a reverse transmission time of the reverse internal RBSinterface information to obtain a compensated reverse transmission time;and transmit, to the REC, the updated reverse internal RBS interfaceinformation at the compensated reverse transmission time.
 17. The systemof claim 16, wherein the first IWF is further configured to: determinean RTM associated with the first IWF processing the forward packet;update the forward RTM information of the forward packet using the RTMassociated with the first IWF processing the forward packet; determinean RTM associated with the first IWF processing the reverse packet; andupdate the reverse RTM information of the reverse packet using the RTMassociated with the first IWF processing the reverse packet.
 18. Thesystem of claim 16, wherein the second IWF is further configured to:determine an RTM associated with the second IWF processing the forwardpacket; and update the forward RTM information of the forward packetusing the RTM associated with the second IWF processing the forwardpacket; determine an RTM associated with the second IWF processing thereverse packet; and update the reverse RTM information of the reversepacket using the RTM associated with the second IWF processing thereverse packet.
 19. The system of claim 16, further comprising: a switchoperationally coupled between the first IWF and the second IWF, whereinthe switch is configured to: receive the forward packet sent from thesecond IWF; determine an RTM associated with the switch processing theforward packet; update the forward RTM information of the forward packetusing the RTM associated with the switch processing the forward packet;transmit, towards the first IWF, the forward packet having the updatedforward RTM information; receive the reverse packet sent from the firstIWF; determine an RTM associated with the switch processing the reversepacket; update the reverse RTM information of the reverse packet usingthe RTM associated with the switch processing the reverse packet; andtransmit, towards the second IWF, the reverse packet having the updatedreverse RTM information.
 20. The system of claim 16, wherein the RTMinformation also characterizes an asymmetry between processing times onlinks in different directions between the RE and the REC; and whereinthe first IWF is further configured to: determine an asymmetrycompensation that compensates the asymmetry using the forward RTMinformation; and apply the asymmetry compensation to a timestamp of theupdated forward internal RBS interface information.
 21. The system ofclaim 16, wherein the RTM information also characterizes an asymmetrybetween processing times on links in different directions between the REand the REC; and wherein the second IWF is further configured to:determine an asymmetry compensation that compensates the asymmetry usingthe reverse RTM information; and apply the asymmetry compensation to atimestamp of the updated reverse internal RBS interface information.